The DDR5 standard should facilitate the production of 16 Gb dies and make vertical stacking easier. Restricted by laws of physics, dies eventually get slower as they increased in size. Once you start putting 16Gb die in 1X memory technology, the distances between them starts to get longer. As a result, core timing parameters become worse. Cadence’s prototype had a CAS latency of 42 (No, not a typo). Although, the test module does run at 1.1 volts, which makes it quite impressive when compared to DDR4.
Cadence expect DDR5-4400 to be the standard for DDR5 with DDR5-6400 coming later down the line. According to their analysis, we could see DDR5-based systems as soon as in 2019. However, they’ll most likely be servers. The process of DDR5 adoption will be gradual and steady until 2021 when it starts to really ramp up. It’s important to point out that the DDR5 standard isn’t completed yet. JEDEC won’t finalize the specifications for DDR5 until sometime this summer. Having being the first with IP for DDR5, Cadence already has its eyes set on LPDDR5 and HBM.
Source : TechPowerUp